The signal line driving circuit of a thin film transistor type liquid crystal display (TFT-LCD) that performs multi-gradation display is an application example of this type of driving circuit.
FIG. 5 shows the basic circuit configuration (in part) of a TFT liquid crystal panel. In this type of liquid crystal panel, multiple gate lines Yi−1, Yi, Yi+1 . . . and multiple signal lines Xj−1, Xj, and Xj+1 . . . are arranged in a matrix pattern. A pixel electrode P made of a transparent electroconductive film and a thin film transistor TFT is arranged for the pixel at each cross point. A signal storage capacitance CL for one pixel is formed by the liquid crystal Q sandwiched between each pixel electrode P and counter electrode COM.
All of the pixel electrodes Pi−1, j, Pi, j . . . in one column (for example, column j) are electrically connected to the common signal line Xj of each column via the respective thin film transistors TFTi−1, j, TFTi, j . . . . The control terminals of all of the thin film transistors TFTi, j−1, TFTi, j, TFTi, j+1 . . . in each row (for example, row i) are electrically connected to a common gate line Yi.
Gate lines Yi−1, Yi, Yi+1 . . . are usually sequentially selected one row (one line) at a time during one frame period (1 V) and are driven to an active state by a gate line driver (not shown in the figure). When a gate line, say, Yi is driven to the active state, that is, H level, all of the thin film transistors TFTi, j−1, TFTi, j . . . on that line (row i) are turned on. At the same time, the analog with respect to all of the pixels on row i are respectively output from the signal line driving parts (not shown in the figure) of the various rows. These are applied (written) to the signal lines Xj−1, Xj . . . of various rows and to the corresponding pixel electrodes Pi, j−1, Pi, j . . . through the respective thin film transistors TFTi, j−1, TFTi, j . . . in the on state. After that, gate line Yi+1 is selected for row (i+1), and the same operation is repeated as described above. By turning off the thin film transistors TFTi, j−1, TFTi, j . . . in row i, the electric charges written to each pixel lose their escape path, and the gradation voltage of each electrode Pi, j−1, Pi, j . . . can be retained until the next selection time.
FIG. 6 shows the configuration of the main parts of the signal line driving part used for driving one signal line Xj of the TFT liquid crystal panel.
In signal line driving part 100 for one channel, the input image data DX for one pixel is input to data latch circuit 102 corresponding to timing pulse TP supplied during one line period. The image data DX is gradation data that designates one of the 2n display gradations that can be displayed by the number of bits n using the data values (d0, d1, . . . dn−1).
The image data DX input to latch circuit 102 are input to DA converter 106 after they are subjected to a voltage conversion from 3 V to 10 V performed in level converting circuit 104.
Multiple V0 to Vk−1 with positive polarity and V′k−1 to V′0 (k=2n) with negative polarity, having voltage levels corresponding to all (2n) of the set display gradations, are supplied from gradation voltage generating circuit 108, which is a voltage dividing resistance circuit for the entire channel, to DA converter 106.
An AC signal or inversion control signal RV used for inverting the gradation voltage for each line (horizontal scanning period H) is supplied from a controller (not shown in the figure) to DA converter 106. DA converter 106 decodes the image data DX for one pixel input from level converting circuit 104 and outputs the gradation voltage corresponding to the logic value of the inversion control signal RV from among the Vj and V′j by using the voltage level corresponding to the display gradation of the image data DX. For example, if RV has H level, the positive gradation voltage Vj is output. If RV has L level, the gradation voltage V′j with negative polarity is output. Although DA converter 106 is virtually a decoder circuit, it actually acts as a DA converter that converts digital data to analog voltages.
Voltage follower (driving circuit) 110 comprises an operational amplifier. It operates in a source mode when a gradation voltage with positive polarity is input. When a gradation voltage with negative polarity is input, it operates in a sink mode. It outputs an output voltage that is equal to the input voltage. The gradation voltage Vj output from voltage follower 110 is supplied to the signal line of the corresponding signal line Xj via output pad 112.
FIG. 7 shows the operation of the signal line driving part 100 for one channel which has the aforementioned configuration. As shown in the figure, when gate line Yi of row i in TFT liquid crystal panel is selected (FIG. 5), gradation voltage Vi, j with positive polarity is output onto signal line Xj from signal line driving part 100. The gradation voltage Vi, j with positive polarity is applied (written) to pixel electrode Pi, j via thin film transistor TFTi, j that is in the on state. Then, when the gate line Yi+1 of row (i+1) is selected, a gradation voltage Vi+i, j with negative polarity is output onto signal line Xj from signal line driving part 100. As a result, the gradation voltage Vi+1, j with negative polarity is applied (written) to pixel electrode Pi+1 via thin film transistor TFTi+1, j that is in the on state.
When the input image data DX is input to latch circuit 102 at the beginning of timing pulse TP during the operation of each line, the gradation voltage Vj corresponding to the value of the input image data DX is input to voltage follower 110 from DA converter 106 immediately after that. Until that time, the voltage of signal line Xj is maintained near the gradation voltage with an opposite polarity supplied to the pixel of the previous line.
When a new gradation voltage Vj is input from DA converter 106 to the non-inverting input terminal (+), voltage follower 110 performs negative feedback for the output voltage, that is, the signal line voltage with respect to the inverting input terminal (−), while raising or lowering the level (that is, driving the voltage of signal line Xj with a load) until it is almost consistent with the input gradation voltage Vj. During rise/drop of the output voltage or the signal line voltage, an operation current Id flows in each part of voltage follower 110. In particular, a charging current for the rise or a discharging current for the drop flows in the output part. After the output voltage (signal line voltage) almost reaches the level (target value) of the input gradation voltage Vj, a constant current Io generated by a constant current source circuit flows in voltage follower 110.
In said TFT-LCD, in order to perform gradation display with high accuracy, the signal line driving part of each channel must write the gradation voltage as indicated by the image data DX to each corresponding pixel electrode P. Therefore, voltage follower 110 must send the exact gradation voltage output from DA converter 106 to the signal line X on the output side.
In the operational amplifier that forms voltage follower 110, however, there are various offsets on the input side or in the amplifier (especially in the differential input part). Because of these offsets, the real value of the output voltage is usually different from the target value, that is, the voltage of the input signal. Although an adjustment circuit can be used to compensate or reduce the offsets, such adjustment is limited. In particular, because the signal line driver of a TFT-LCD has hundreds of voltage followers or driving circuits incorporated in one chip, it is difficult to eliminate the variation among so many driving circuits. Another method for solving the problem of the offsets is to improve the characteristics of the transistors that constitute the operational amplifier. This method, however, requires a very difficult process and a high cost. Also, the size of the transistors will be increased (that is, the area of the chip becomes larger).
Also, in the conventional voltage follower 110, because a constant current generated by an internal constant current source circuit flows in each part after the output voltage or signal line voltage almost reaches the target value, a constant current (idling-standby current) Io is consumed by the entire voltage follower. The current consumed by the entire driver is large.
A purpose of this invention is to solve said problems by providing a driving circuit that can easily and efficiently compensate or avoid the influence of the offsets and can correctly match the voltage of the output signal with the target value, that is, the voltage of the input signal.
Another purpose of the present invention is to provide a driving circuit that can significantly reduce the current consumed.